203 lines
11 KiB
VHDL
Executable File
203 lines
11 KiB
VHDL
Executable File
library IEEE;
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use IEEE.std_logic_1164.all; -- defines std_logic types
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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-- Copyright (C) 2007, Peter C. Wallace, Mesa Electronics
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-- http://www.mesanet.com
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--
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-- This program is is licensed under a disjunctive dual license giving you
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-- the choice of one of the two following sets of free software/open source
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-- licensing terms:
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--
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-- * GNU General Public License (GPL), version 2.0 or later
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-- * 3-clause BSD License
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--
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--
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-- The GNU GPL License:
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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--
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--
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-- The 3-clause BSD License:
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--
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-- Redistribution and use in source and binary forms, with or without
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-- modification, are permitted provided that the following conditions
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-- are met:
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--
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-- * Redistributions of source code must retain the above copyright
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-- notice, this list of conditions and the following disclaimer.
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--
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-- * Redistributions in binary form must reproduce the above
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-- copyright notice, this list of conditions and the following
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-- disclaimer in the documentation and/or other materials
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-- provided with the distribution.
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--
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-- * Neither the name of Mesa Electronics nor the names of its
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-- contributors may be used to endorse or promote products
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-- derived from this software without specific prior written
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-- permission.
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--
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--
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-- Disclaimer:
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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-- FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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-- COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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-- INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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-- BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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-- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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-- LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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-- ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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use work.IDROMConst.all;
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package PIN_7I95_7I76D_58 is
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constant ModuleID : ModuleIDType :=(
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(HM2DPLLTag, x"00", ClockLowTag, x"01", HM2DPLLBaseRateAddr&PadT, HM2DPLLNumRegs, x"00", HM2DPLLMPBitMask),
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(WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask),
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(IOPortTag, x"00", ClockLowTag, x"02", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask),
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(MuxedQcountTag, MQCRev, ClockLowTag, x"08", MuxedQcounterAddr&PadT, MuxedQCounterNumRegs,x"00", MuxedQCounterMPBitMask),
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(MuxedQCountSelTag, x"00", ClockLowTag, x"01", NullAddr&PadT, x"00", x"00", x"00000000"),
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(SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask),
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(StepGenTag, x"02", ClockLowTag, x"07", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask),
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(XFrmrOutTag, x"00", ClockLowTag, x"01", XFrmrDataAddr&PadT, XFrmrNumRegs, x"00", XFrmrMPBitMask ),
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(InMuxTag, x"00", ClockLowTag, x"01", InMuxControlAddr&PadT, InMuxNumRegs, x"00", InmuxMPBitMask),
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(LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
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(InMuxWidth0Tag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000018") -- hide this tag here until we find a better way
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);
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constant PinDesc : PinDescType :=(
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-- Base func sec unit sec func sec pin
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--
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IOPortTag & x"00" & StepGenTag & StepGenStepPin, -- I/O 00 embedded 7I95 STEP/DIR and encoder
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IOPortTag & x"00" & StepGenTag & StepGenDirPin, -- I/O 01
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IOPortTag & x"01" & StepGenTag & StepGenStepPin, -- I/O 02
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IOPortTag & x"01" & StepGenTag & StepGenDirPin, -- I/O 03
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IOPortTag & x"02" & StepGenTag & StepGenStepPin, -- I/O 04
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IOPortTag & x"02" & StepGenTag & StepGenDirPin, -- I/O 05
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IOPortTag & x"03" & StepGenTag & StepGenStepPin, -- I/O 06
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IOPortTag & x"03" & StepGenTag & StepGenDirPin, -- I/O 07
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IOPortTag & x"04" & StepGenTag & StepGenStepPin, -- I/O 08
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IOPortTag & x"04" & StepGenTag & StepGenDirPin, -- I/O 09
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IOPortTag & x"05" & StepGenTag & StepGenStepPin, -- I/O 10
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IOPortTag & x"05" & StepGenTag & StepGenDirPin, -- I/O 11
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IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 12 Expansion RS-422
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IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 13
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IOPortTag & x"00" & SSerialTag & SSerialTXEn0Pin, -- I/O 14
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IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 15
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IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 16
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IOPortTag & x"00" & SSerialTag & SSerialTXEn1Pin, -- I/O 17
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IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 18 embedded 7I95 encoder
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IOPortTag & x"00" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 19
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IOPortTag & x"00" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 20
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IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 21
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IOPortTag & x"01" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 22
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IOPortTag & x"01" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 23
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IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 24
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IOPortTag & x"02" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 25
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IOPortTag & x"02" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 26
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IOPortTag & x"00" & MuxedQCountSelTag & MuxedQCountSel0Pin, -- I/O 27
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IOPortTag & x"00" & InMuxTag & InMuxAddr0Pin, -- I/O 28 muxadd0
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IOPortTag & x"00" & InMuxTag & InMuxAddr1Pin, -- I/O 29 muxadd1
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IOPortTag & x"00" & InMuxTag & InMuxAddr2Pin, -- I/O 30 muxadd2
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IOPortTag & x"00" & InMuxTag & InMuxAddr3Pin, -- I/O 31 muxadd3
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IOPortTag & x"00" & InMuxTag & InMuxAddr4Pin, -- I/O 32 muxadd4
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IOPortTag & x"00" & InMuxTag & InMuxDataPin, -- I/O 33 muxindata
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut0Pin, -- I/O 34
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut1Pin, -- I/O 35
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut2Pin, -- I/O 36
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut3Pin, -- I/O 37
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut4Pin, -- I/O 38
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IOPortTag & x"00" & XfrmrOutTag & XfrmrOut5Pin, -- I/O 39
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IOPortTag & x"00" & XfrmrOutTag & XfrmrRefPin, -- I/O 40
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IOPortTag & x"06" & StepGenTag & StepGenDirPin, -- I/O 41 PIN 1 PIN 1
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IOPortTag & x"06" & StepGenTag & StepGenStepPin, -- I/O 42 PIN 2 PIN 14
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IOPortTag & x"00" & NullTag & x"00", -- I/O 43 PIN 3 PIN 2
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IOPortTag & x"00" & NullTag & x"00", -- I/O 44 PIN 4 PIN 15
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IOPortTag & x"00" & NullTag & x"00", -- I/O 45 PIN 5 PIN 3
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IOPortTag & x"00" & NullTag & x"00", -- I/O 46 PIN 6 PIN 16
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IOPortTag & x"00" & NullTag & x"00", -- I/O 47 PIN 7 PIN 4
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IOPortTag & x"00" & NullTag & x"00", -- I/O 48 PIN 8 PIN 17
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IOPortTag & x"00" & NullTag & x"00", -- I/O 49 PIN 9 PIN 5
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IOPortTag & x"00" & NullTag & x"00", -- I/O 50 PIN 11 PIN 6
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IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 51 PIN 13 PIN 7
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IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 52 PIN 15 PIN 8
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IOPortTag & x"00" & SSerialTag & SSerialTX2Pin, -- I/O 53 PIN 17 PIN 9
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IOPortTag & x"00" & SSerialTag & SSerialRX2Pin, -- I/O 54 PIN 19 PIN 10
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IOPortTag & x"03" & MuxedQCountTag & MuxedQCountIDXPin, -- I/O 55 PIN 21 PIN 11
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IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQBPin, -- I/O 56 PIN 23 PIN 12
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IOPortTag & x"03" & MuxedQCountTag & MuxedQCountQAPin, -- I/O 57 PIN 25 PIN 13
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin, -- added for IDROM v3
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,
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emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin,emptypin);
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end package PIN_7I95_7I76D_58;
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